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| LETE - OBSO - N-Channel Depletion-Mode Vertical DMOS FETs Ordering Information BVDSX / BVDGX 400V RDS(ON) (max) 6.0 IDSS (min) 300mA Order Number / Package TO-92 DN2640N3 Die DN2640ND DN2640 Preliminary Features High input impedance Low input capacitance Fast switching speeds Low on resistance Free from secondary breakdown Low input and output leakage Advanced DMOS Technology These depletion-mode (normally-on) transistors utilize an advanced vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, these devices are free from thermal runaway and thermally-induced secondary breakdown. Supertex's vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. 8 Applications Normally-on switches Solid state relays Converters Linear amplifiers Constant current sources Power supply circuits Telecom Package Options Absolute Maximum Ratings Drain-to-Source Voltage Drain-to-Gate Voltage Gate-to-Source Voltage Operating and Storage Temperature Soldering Temperature* * Distance of 1.6 mm from case for 10 seconds. BVDSX BVDGX 20V -55C to +150C 300C SGD TO-92 Note: See Package Outline section for dimensions. 8-13 DN2640 Thermal Characteristics Package TO-92 ID (continuous)* 250mA ID (pulsed) 600mA Power Dissipation @ TC = 25C 1.0W jc ja IDR* 250mA IDRM 600mA C/W 125 C/W 170 * ID (continuous) is limited by max rated Tj. LETE - OBSO - Electrical Characteristics Symbol BVDSX VGS(OFF) VGS(OFF) IGSS ID(OFF) Parameter Drain-to-Source Breakdown Voltage Gate-to-Source OFF Voltage Change in VGS(OFF) with Temperature Gate Body Leakage Current Drain-to-Source Leakage Current Min 400 -1.0 -3.5 4.5 100 10 1.0 IDSS RDS(ON) RDS(ON) GFS CISS COSS CRSS td(ON) tr td(OFF) tf VSD trr Saturated Drain-to-Source Current Static Drain-to-Source ON-State Resistance Change in RDS(ON) with Temperature Forward Transconductance Input Capacitance Common Source Output Capacitance Reverse Transfer Capacitance Turn-ON Delay Time Rise Time Turn-OFF Delay Time Fall Time Diode Forward Voltage Drop Reverse Recovery Time 800 300 750 75 15 15 20 25 25 1.8 V ns ns pF 300 6.0 1.1 Typ Max Unit V V mV/C nA A mA mA %/C m (@ 25C unless otherwise specified) Conditions VGS = -5V, ID = 1.0mA VDS = 25V, ID= 10A VDS = 25V, ID= 10A VGS = 20V, VDS = 0V VGS = -10V, VDS = Max Rating VGS = -10V, VDS = 0.8 Max Rating TA = 125C VGS = 0V, VDS = 25V VGS = 0V, ID = 150mA VGS = 0V, ID = 150mA ID = 200mA, VDS = 10V VGS = -10V, VDS = 25V f = 1 MHz Notes: 1. All D.C. parameters 100% tested at 25C unless otherwise stated. (Pulse test: 300s pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 0V 90% INPUT -10V PULSE GENERATOR Rgen 10% t(ON) t(OFF) tr td(OFF) tF td(ON) VDD 10% 10% INPUT OUTPUT 0V 90% 90% 8-14 VDD = 25V, ID = 200mA, RGEN = 10 VGS = -10V, ISD = 200mA VGS = -10V, ISD = 1.0A VDD RL OUTPUT D.U.T. |
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